Bill Siever, Michael Hall, Jim Feher, and Roger Chamberlain, “Digital logic, computer architecture, and dev containers: Supporting schools from little to large,” in Proceedings of the 56th ACM Technical Symposium on Computer Science Education V. 2, 2025, pp. 1737 – 1737. (Published abstract and conference demo). doi: 10.1145/3641555.3705024
Michael J. Hall, Neil E. Olson, and Roger D. Chamberlain, “Utilizing Virtualized Hardware Logic Computations to Benefit Multi-User Performance,” Electronics 2021, 10(6), 665, Mar 2021. doi: 10.3390/electronics10060665
Michael J. Hall, Neil Olson, and Roger Chamberlain, “Data from Virtualized Hardware Logic Computations” (2021). Digital Research Materials (Data & Supplemental files). 60.
https://openscholarship.wustl.edu/data/60. doi: 10.7936/46pb-xw44
Michael J. Hall, Viktor Gruev, and Roger D. Chamberlain, “Characterization of a binary output resistance-to-voltage read circuit for sensing magnetic tunnel junctions,” IEEE Sensors Journal, vol. 18, no. 3, pp. 1023 – 1031, Feb 2018. doi: 10.1109/jsen.2017.2780112
Michael J. Hall, and Roger D. Chamberlain. “Using M/G/1 queueing models with vacations to analyze virtualized logic computations,” in 2015 33rd IEEE Int’l Conf. on Computer Design (ICCD), Oct. 2015, pp. 78 – 85. doi: 10.1109/iccd.2015.7357087
Michael J. Hall, Roger D. Chamberlain. “Performance modeling of virtualized custom logic computations,” in Proc. of the 25th IEEE Int’l Conf. on Application-specific Systems Architectures and Processors (ASAP), Jun. 2014. doi: 10.1109/asap.2014.6868635.
Michael J. Hall, Roger D. Chamberlain. “Performance modeling of virtualized custom logic computations,” in Proc. of the 24th ACM Int’l Great Lakes Symposium on VLSI, 2014. doi: 10.1145/2591513.2591570.
Michael J. Hall, Viktor Gruev, Roger D. Chamberlain. “Performance of a resistance-to-voltage read circuit for sensing magnetic tunnel junctions,” Circuits and Syst. (MWSCAS), 2012 IEEE 55th Int. Midwest Symp., August 2012. doi: 10.1109/mwscas.2012.6292101
Michael J. Hall, Viktor Gruev, Roger D. Chamberlain. “Noise analysis of a current-mode read circuit for sensing magnetic tunnel junction resistance,” Circuits and Syst. (ISCAS), 2011 IEEE, May 2011. doi: 10.1109/iscas.2011.5937938
Linda M. Engelbrecht, Albrecht Jander, Pallavi Dhagat, Michael J. Hall. “A toggle MRAM bit modeled in Verilog-A,” Solid-State Electronics, vol. 54, no. 10, pp. 1135 – 1142, Oct. 2010. Selected Papers from ISDRS 2009. doi: 10.1016/j.sse.2010.05.038
Roger Chamberlain, Mark Franklin, Eric Tyson, James Buckley, Jeremy Buhler, Greg Galloway, Saurabh Gayen, Michael Hall, Berkley Shands, and Naveen Singla. “Auto-Pipe: Streaming applications on architecturally diverse systems,” Computer, vol. 43, pp. 42 – 49, 2010. doi: 10.1109/mc.2010.62
George L. Engel, Michael J. Hall, Justin M. Proctor, Jon M. Elson, Lee G. Sobotka, Rebecca S. Shane, Robert J. Charity. “Design and performance of a multi-channel, multi-sampling, PSD-enabling integrated circuit,” Nuclear Instruments and Meth. A, vol. 612, no. 1, pp. 161 – 170, December 2009. doi: 10.1016/j.nima.2009.10.058
Raphael Njuguna, Michael Hall, and Vicktor Gruev. “Low power CMOS image sensor with programmable spatial filtering,” in IEEE Sensors 2009, October 2009, pp. 189 – 192. doi: 10.1109/icsens.2009.5398196
Michael Hall, Albrecht Jander, Roger D. Chamberlain, and Pallavi Dhagat, “Globally Clocked Magnetic Logic Circuits,” in Digest of International Magnetics Conference (Intermag), May 2009. PDF
Naveen Singla, Michael Hall, Berkley Shands, and Roger D. Chamberlain. “Financial Monte Carlo simulation on architecturally diverse systems,” in Workshop on High Perf. Comput. Finance, 2008. WHPCF 2008., 2008, pp. 1 – 7. doi: 10.1109/whpcf.2008.4745401
Michael Hall, Roger D. Chamberlain. “Virtualization of Deeply Pipelined Magnetologic.” Poster presented at the 2017 IEEE International Conference on Rebooting Computing (ICRC), Washington, DC, USA, November 8 – 9, 2017. Conference Poster.
Michael Hall, “Using M/G/1 Queueing Models with Vacations to Analyze Virtualized Logic Computations,” Presented at the 33rd IEEE International Conference on Computer Design, New York, NY, USA, October 19, 2015. Slides.
Michael Hall, “Utilizing Magnetic Tunnel Junctions in Digital Systems,” Dissertation Defense, Presented in the Dept. of Computer Science & Engineering, Washington University in St. Louis, St. Louis, MO, USA, April 10, 2015. Slides.
Michael J. Hall, Roger D. Chamberlain. “Performance Modeling of Virtualized Custom Logic Computations,” Poster presented at the 2014 IEEE 25th International Conference on Application-Specific Systems, Architectures and Processors, Zurich, Switzerland, June 18 – 20, 2014. Conference Poster.
Michael J. Hall, Roger D. Chamberlain. “Performance Modeling of Virtualized Custom Logic Computations,” Poster presented at the 24th International Great Lakes Symposium on VLSI, May 21 – 23, 2014. Conference Poster.
Michael Hall, “Evaluating MTJ Benefits and Utilizing Context-Switched Hardware for Designing Magnetologic Circuits,” Dissertation Proposal Defense, Presented in the Dept. of Computer Science & Engineering, Washington University in St. Louis, St. Louis, MO, USA, May 23, 2013. Slides
Michael Hall, “Performance of a Resistance-To-Voltage Read Circuit for Sensing Magnetic Tunnel Junctions,” Presented at the 55th IEEE International Midwest Symposium on Circuits and Systems, Boise, Idaho, USA, August 7, 2012. Slides.
Michael Hall, “Noise Analysis of a Current-Mode Read Circuit for Sensing Magnetic Tunnel Junction Resistance,” Presented at IEEE International Symposium on Circuits and Systems (ISCAS), Rio de Janeiro, Brazil, May 17, 2011. Slides.
Michael Hall, “Magnetic Random Access Memory (MRAM),” Oral Qualifications, Presented in the Dept. of Computer Science & Engineering, Washington University in St. Louis, St. Louis, MO, USA, November 11, 2009. Slides.
Michael Hall, Albrecht Jander, Roger D. Chamberlain, and Pallavi Dhagat, “Globally Clocked Magnetic Logic Circuits,” Report Number: wucse-2009-76 (2009). All Computer Science and Engineering Research. doi: 10.7936/K77D2SCR
Michael Hall, “Globally Clocked Magnetic Logic Circuits,” Presented at IEEE International Magnetic Conference, Sacramento, CA, USA, May 5, 2009. Slides.
Michael Hall, “Performance analysis of OpenVPN on a consumer grade router,” CSE 567M, November 2008, a survey paper written under the guidance of Prof. Raj Jain. [Online]. Available: https://www.cse.wustl.edu/~jain/cse567-08/ftp/ovpn/index.html.
Michael Hall, “Design Considerations in Systems Employing Multiple Charge Integration for the Detection of Ionizing Radiation,” Masters Thesis Defense, Department of Electrical and Computer Engineering, Southern Illinois University Edwardsville, Edwardsville, IL, USA, December 13, 2007. Slides.
Michael Hall, “Development of a Multi-Channel Integrated Circuit for Use in Nuclear Physics Experiments Where Particle Identification is Important”, Presented in the Central States Universities Incorporated Research Conference, held at Argonne National Laboratory, Lemont, IL, USA, November 2, 2007. Slides.
Michael Hall, “Development of a Multi-Channel Integrated Circuit for Use in Nuclear Physics Experiments Where Particle Identification is Important”, Presented at SIUE Graduate Student Research Symposium, Southern Illinois University Edwardsville, Edwardsville, IL, USA, April 3, 2007. Slides.
